1. Field of the Invention
This invention relates in general to integrated circuits and specifically to level shifters for integrated circuits.
2. Description of the Related Art
Level shifters are utilized in integrated circuits for changing the voltage of a signal from a first voltage to a second voltage.
FIG. 1 is a circuit diagram of a prior art level shifter. Level shifter 101 includes circuitry located in a voltage domain 1 (Domain 1) of an integrated circuit and circuitry located in a voltage domain 2 (Domain 2) of an integrated circuit. A voltage domain is a portion of an integrated circuit that is operable at a given supply voltage. A inverter 119 is located in Domain 1. N type field effect transistors (NFETs) 117 an 115 and P-type field effect transistors (PFETs) 111 and 113 are located in Domain 2. Inverter 119 includes a power supply terminal coupled to a Domain 1 voltage supply rail 109 (at voltage VDD1). A source/drain terminal (a current terminal of a FET) of PFET 111 and a source/drain terminal of PFET 113 are connected to Domain 2 voltage supply rail 107 (at voltage VDD2).
A high voltage (e.g. VDD1) at input terminal 103 makes NFET 117 conductive and pulls the output of inverter 119 to VSS. The output of inverter 119 being at VSS makes NFET 115 non conductive. Making NFET 117 conductive pulls the gate terminal (the control terminal of a FET) of PFET 113 to VSS making PFET 113 conductive. Making PFET 113 conductive pulls output terminal 105 to VDD2 thereby making PFET 111 non conductive. Accordingly, a change to a high voltage of VDD1 at terminal 103 corresponds to a change to high voltage of VDD2 at terminal 105. Also, a change to a low voltage of VSS at terminal 103 corresponds to a change to a low voltage of VSS at terminal 105.
Level shifter 101 is a unidirectional in that a change in the voltage of terminal 105 will not cause a corresponding change in voltage of terminal 103. In addition, level shifter 101 includes two lines that cross domain boundary 104 (the line from the output of inverter 119 to the gate terminal of NFET 115 and the line from signal terminal 103 to the gate terminal of NFET 117).
FIG. 2 is a circuit diagram of another prior art level shifter. Level shifter 201 includes a resistor 208 coupled to a Domain 2 voltage supply rail 207 (at VDD2). Resistor 208 is connected to NFET 213, both of which are located in the second voltage domain (Domain 2). An output terminal 205 is connected to the source/drain terminal of NFET 213. The input terminal 203 is connected to the input of inverter 211, which is located in voltage domain 1 (Domain 1). The output of inverter 211 is coupled to the gate terminal of NFET 213. Level shifter only has one signal line (the signal line from the output of inverter 211 to the gate terminal of NFET 213) that crosses the domain boundary 204. However, a constant current flows through resister 208 when NFET 213 is conductive. This constant current flow consumes energy during operation.
What is needed is an improved level shifter.
The use of the same reference symbols in different drawings indicates identical items unless otherwise noted.